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STD8085


Industry standard 8085 8-bit processor


Overview

The STD8085 is the 8 bit microprocessor IP core, which may be used as replacement of 8085 processor device. Its software and cycle compatibility with industry standard, allows to use STD8085 in old projects, where 8085 devices are used.

The IP core is fully synchronous, one clock edge design. Compatibility to original device has been confirmed by direct, pin-to-pin comparison to original chip. Test environment diagram is shown on the picture below.

Test environment diagram

Watch YouTube video example about replacing old 8085 processor with STD8085 implemented on FPGA:


Key Features
  • Software and cycle compatible with 8085 industry standard
  • Synchronous with one clock domain, without latches
  • Separate data and address bus – do not require external address latch
  • Parametrized source code prevents wasting silicon for unused functionality
  • Synchronous RTL design, implementable in every technology
  • Test benches
Applications
  • Replacement for legacy 8085 devices
  • Education

Structure

Main control - This module decodes opcodes and controls execution of each instruction. It also controls serial input and output.

ALU - Arithmetic Logic Unit. It performs operations like adding, substracting, logic AND, OR,  XOR, shifts, etc.

Memory control - Controls memory and I/O access. Ensures correct timming compatible with legacy standard.

Clock control - This unit is used for generating internal clock for cycle compatibility.

Interrupt control - Controls interrupt events and priorities.


Implementation

Altera
Family
Speed grade
Area Frequency
[MHz]
Cyclone II 6 1601 [LC] 122
Cyclone III 6 1610 [LC] 141
Stratix II 3 1258 [ALUT] 157

 

Xilinx
Family
Speed grade
Area Frequency
[MHz]
Spartan 3E -5 1162 [Slices] 87
Virtex IV
-12 1201 [Slices] 143
Virtex V
-3 476 [Slices] 184